BIT7 : /PAPU

/PAPU: PORTA pull-up enable bit
1 = PORTA pull-up is enabled
0 = PORTA pull-up is enabled by each port latch value

BIT6 : INTEDG

INTEDG: Interrupt edge select bit
1 = Interrupt on rising edge of PC1/INT pin
0 = Interrupt on falling edge of PC1/INT pin

BIT5 : T0CS

T0CS: Timer0 clock source selection bit
1 = transition on the PA2/T0CKI pin
0 = Internal instruction cycle

BIT4 : T0SE

T0SE: Timer0 clock source edge select bit
1 = Increment on falling edge of PA2/T0CKI pin
0 = Increment on rising edge of PA2/T0CKI pin

BIT3 : PSA

PSA: Prescaler Assignment Bits
1 = Prescaler assigned to WDT
0 = Prescaler assigned to Timer0 module

BIT <0 : 2> : Prescaler selection bits

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