BIT7 : reserved bit
BIT6 : Regulator output enable
0 = PA4 and PC5 are normal IO
1 = On-chip regulator is turned on, PA4 and PC5 output regulator voltage
BIT5 : TIMER2 clock source selectio
0 = TIMER2 clock source is the system clock
1 = TIMER2 clock source is internal 32MHz
BIT4 : SLVREN
Software controlled LVR enable bits, when UCFG1<1:0> are ’01’:
1 = Turn on LVR
0 = disable LVR
when
When UCFG1<1:0> is not 01, this bit has no practical meaning
Note: This bit will not be cleared when a Brown-out Reset occurs
0 . Any other reset will reset it
clear 0
BIT3 : Reserved bit, cannot write 1
BIT 2 : CKMAVG
Fast clock measurement slow clock period measurement averaging mode
1 = Turn on averaging mode (automatically measure and accumulate 4 times)
0 = Turn off averaging mode
BIT1 : CKCNTI
Clock Count Init
Enable fast clock to measure slow clock period
1 = Enable fast clock to measure slow clock period
0 = Disable fast clock to measure slow clock period
Note: This digit will automatically return to zero after the measurement is completed
BIT0 : Reserved bit, cannot write 1
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